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PRELIMINARY DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
PC8158K
RF UP-CONVERTER WITH AGC FUNCTION + IF QUADRATURE MODULATOR IC FOR DIGITAL MOBILE COMMUNICATION SYSTEMS
DESCRIPTION
The PC8158K is a silicon microwave monolithic integrated circuit designed as quadrature modulator for digital mobile communication systems. This MMIC consists of 0.8 GHz to 1.5 GHz up-converter and 100 MHz to 300 MHz quadrature modulator which are equipped with AGC and power save functions. NEC's. This configuration suits to IF Consequently the modulation system. The package is 28-pin QFN suitable for high density mounting. The chip is manufactured using 20 GHz fT silicon bipolar process NESATTM III to realize low power consumption.
PC8158K can contribute to make RF blocks smaller size, higher performance and lower power consumption.
FEATURES
* * * * * Supply voltage: VCC = 2.7 to 4.0 V, ICC = 28 mA @ VCC = 3.0 V Built-in LPF suppresses spurious multipled by TX local (LO1) AGC amplifier is installed in local port of up converter: GCR = 35 dB MIN. @ fout = 1.5 GHz Excellent performance: Padj = -65 dBc TYP. @ f = 50 kHz, EVM = 1.2 % rms TYP. External IF filter can be applied between modulator output and up converter input terminal.
APPLICATIONS
* Digital cellular phones (PDC800M, PDC1.5G and so on)
ORDERING INFORMATION
Part Number Package 28-pin plastic QFN (5.1 x 5.5 x 0.95 mm) Embossed tape 12 mm wide. Pin 1 is in pull-out direction. QTY 2.5 kp/Reel. Supplying Form
PC8158K-E1
Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:
PC8158K)
Caution
Electro-static sensitive device
The information in this document is subject to change without notice.
Document No. P13831EJ1V1DS00 (1st edition) Date Published January 1999 N CP(K) Printed in Japan
(c)
1998
PC8158K
INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS (TOP View)
QMOD + AGC + Up-Mix QMOD + AGC + Up-Mix QMOD + AGC + Up-Mix
Output Buffer
VPS/VAGC
GND
GND
GND
N.C.
22
21
20
19 AGCcont
18
N.C.
17
16
15
RFout
23
Up-Mix
N.C.
VCC
14
LO2inb
N.C. VCC Output Buffer
24 AGC 25 LPF REG
13
LO2in GND QMOD + AGC + Up-Mix
12
Fil1
26
REG
11
VCC QMOD + AGC + Up-Mix LO1in
Fil2
27
10
GND 28 I/Q-Mix QMOD + AGC + Up-Mix Phase Shifter 1 2 3 4 5 6 7 8 9 LO1inb
Qinb
N.C.
N.C.
N.C.
2
Preliminary Data Sheet P13831EJ1V1DS00
N.C.
Iinb
Qin
Iin
PC8158K
QUADRATURE MODULATOR SERIES
fLO1in (MHz) fMODout (MHz) 50 to 150 Up-Converter Phase fRFout (MHz) Shifter External 900 to 1 900 F/F Doubler + F/F
Part Number
Functions 150 MHz Quad. Mod RF Up-Converter + IF Quad. Mod 400 MHz Quad. Mod
ICC (mA)
Package 20-pin SSOP (225 mil)
Application CT-2, etc. Digital Comm.
PC8101GR PC8104GR PC8105GR PC8110GR PC8125GR PC8126GR PC8126K PC8129GR
15/@ 2.7 V 100 to 300 28/@ 3.0 V
100 to 400
16/@ 3.0 V
100 to 400
External
16-pin SSOP (225 mil) 20-pin SSOP (225 mil) PDC800 MHz, etc. PHS
1GHz Direct Quad. Mod
24/@ 3.0 V
800 to 1 000
Direct
RF Up-Converter + IF Quad. Mod + AGC 900 MHz Direct Quad. Mod with Offset-Mixer x2LO IF Quad. Mod + RF Up-Converter
36/@ 3.0 V
220 to 270
1 800 to 2 000
35/@ 3.0 V
915 to 960 889 to 960
915 to 960 (LO pre-mixer) 800 to 1900 F/F
PDC800 MHz 28-pin QFN 20-pin SSOP (225 mil) 30-pin TSSOP (225 mil) 28-pin QFN GSM, DCS1800, etc. PHS
28/@ 3.0 V 200 to 800 100 to 400
PC8139GR-7JH Transceiver IC (1.9 GHz Indirect Quad. Mod + RX-IF + IF VCO) PC8158K
RF Up-Converter + IF Quad. Mod + AGC
TX: 32.5 RX: 4.8 /@ 3.0 V 28/@ 3.0 V
220 to 270
1 800 to 2 000
CR
100 to 300
800 to 1 500
PDC800 M/ 1.5 G
For outline of the quadrature modulator series, please refer to the application note `Usage of PC8101, 8104, 8105, 8125, 8129' (Document No. P13251E) and so on. SYSTEM APPLICATION EXAMPLE [PDC800 MHz/1.5 GHz]
SUB ANT LNA SW MAIN ANT 1st LO SW SW LO2 AGC 0 LO1 I PLL1 PLL2 2nd LO RSSI 1st MIX 2nd MIX To DEMOD RSSI OUT
(CR)
PA 90 Q
Filter
PC8158K
Preliminary Data Sheet P13831EJ1V1DS00
3
PC8158K
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Symbol VCC Conditions Pin11, 20 and 25, TA = +25C Pin17, TA = +25C
Note
Rating 5.0
Unit V
Power Save and AGC Control Pin Applied Voltage Power Dissipation Operating Ambient Temperature Storage Temperature
VPS/VAGC
5.0
V
PD TA Tstg
TA = +85C
430 -40 to +85 -55 to +150
mW C C
Note Mounted on double sided copper clad 50 x 50 x 1.6 mm epoxy glass PWB. RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Power Save Voltage AGC Control Voltage Operating Ambient Temperature Up-converter RF Output Frequency LO2 Input Frequency I/Q Input Frequency Symbol VCC VPS VAGCPS TA fRFout fLO2in fI/Qin PLO2in = -15 dBm VI/Qin = 500 mVP-P MAX. (Differential input) Test Conditions Pin11, 20 and 25 Pin17 Pin17 MIN. 2.7 0 1.0 -30 800 600 DC TYP. 3.0 - - +25 - - - MAX. 4.0 0.3 2.5 +80 1500 1750 10 Unit V V V C MHz MHz MHz
LO1 Input Level LO2 Input Level I/Q Input Amplitude Up-converter Input Frequency Modulator Output Frequency LO1 Input Frequency
PLO1in PLO2in VI/Qin fUPCONin fMODout fLO1in PLO1in = -15 dBm I, Ib, Q, Qb each
-18 -18 - 100
-15 -15 420 -
-12 -12 500 300
dBm dBm mVP-P MHz
4
Preliminary Data Sheet P13831EJ1V1DS00
PC8158K
ELECTRICAL CHARACTERISTICS Conditions (Unless otherwise specified): TA = +25 C, VCC1 = VCC2 = VCC3 = 3.0 V, VPS/VAGC = 2.5 V, I/Q (DC) = Ib/Qb (DC) = VCC/2 = 1.5 V, VI/Ibin = VQ/Qbin = 500 mVP-P (each), fI/Qin = 2.625 kHz, /4DQPSK wave input, transmission rate 42 kbps, filter roll-off = 0.5, Modulation Pattern: <0000> fLO1in = 178.05 MHz, PLO1in = -15 dBm fLO2in = 1619.05 MHz, PLO2in = -15 dBm fRFout = 1441 MHz - fI/Qin
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
UP-CONVERTER + QUADRATURE MODULATOR TOTAL Total Circuit Current Total Circuit Current at Power Save Mode ICC (TOTAL) ICC (PS) TOTAL No input signal VPS 0.5 V (Low), No input signal VAGC = 2.5 V VAGC = 1.0 V fLOL = fLO1 + fLO2 23.7 - 28 0.3 37.6 10 mA
A
dBm dBm dBc dBc dBc dB %rms dBc
Total Output Power 1 Total Output Power 2 LO Carrier Leak Image Rejection (Side Band Leak) I/Q 3rd order distortion AGC Gain Control Range Error Vector Magnitude Adjacent channel interference
PRFout1 PRFout2 LOL ImR IM3 (I/Q) GCR EVM Padj
-15 -56.5 - - -
-11.5 -52 -40 -40 -50 40 1.2 -65
-8 -46.5 -30 -30 -30 - 3.0 -60
VAGC = 2 V 1 V MOD Pattern: PN9
35 - -
Note
f = 50 kHz, MOD Pattern: PN9
fLO1 x 8, fLO1 x 8 (image) VPS (Low) VPS (High) VPS (High) VPS (Low) Between pin I/Ib, Q/Qb Between pin I/Ib, Q/Qb fLO1 = 100 M to 300 MHz
Spurious suppression Power Save Rise Time Power Save Fall Time I/Q input impedance I/Q input bias current LO1 input VSWR
Pout (8fLO1) TPS (Rise) TPS (Fall) ZI/Q II/Q ZLO1
- - - 80 - -
-70 2 2 200 5 1.5:1
-65 5 5 - 13 -
dBc
s s
k
A
-
Note Without external LC between Fil1 and Fil2 pin on this frequency conditions. Spectrum analyzer conditions: VBW = 300 Hz, RBW = 300 Hz. Remark Electrical characteristics in this document is described for 1.5 GHz system.
Preliminary Data Sheet P13831EJ1V1DS00
5
PC8158K
PIN EXPLANATIONS
Supply Voltage (V) VCC/2 Pin Voltage (V)
Note
Pin No. 1
Symbol
Function and Application
Internal Equivalent Circuit
Iin
-
Input for I signal. This input impedance is 200 k. In the case of that I/Q input signals are single ended, amplitude of the signal is 500 m VP-P max. Input for I signal. This input impedance is 200 k. In the case of that I/Q input signals are single ended, VCC/2 biased DC signal should be input. In the case of the I/Q input signals are differential, amplitude of the signal is 500 m VP-P max. This pin is not connected to internal circuit. This pin should be opened or grounded. Input for Q signal. This input impedance is 200 k. In the case of that I/Q input signals are single ended, amplitude of the signal is 500 m VP-P max. Input for I signal. This input impedance is 200 k. In the case of that I/Q input signals are single ended, VCC/2 biased DC signal should be input. In case of the I/Q input signals are differential, amplitude of the signal is 500 m VP-P max. These pins are not connected to internal circuit. These pins should be opened or grounded. Bypass pin of modulator's local input. This pin should be decoupled with 330 pF capacitor. Local signal input for modulator. This pin must be coupled with DC cut capacitor 330 pF and should be terminated with 51 resistor. Supply voltage pin for modulator, up-converter and AGC circuits. -----------------
2
Iinb
VCC/2
-
1
2
3
N.C.
-
-
-----------------
4
Qinb
VCC/2
-
5
Qin
VCC/2
-
4
5
6 7 8 9
N.C. N.C. N.C. LO1inb
-
-
-----------------
-
2.98
9
10
10
LO1in
-
2.98
11
VCC
2.7 to 4.0
-
Note Pin Voltages are measured on VCC = 3.0 V.
6
Preliminary Data Sheet P13831EJ1V1DS00
PC8158K
Supply Voltage (V) 0 Pin Voltage (V)
Note
Pin No. 12
Symbol
Function and Application
Internal Equivalent Circuit
GND
-
Ground pin for modulator, upconverter and AGC circuits. This pin should be grounded with minimum inductance. Form the ground pattern as widely as possible to minimize ground impedance. Local signal input for modulator. This pin must be coupled with DC cut capacitor 33 pF and should be terminated with 51 resistor. Bypass pin of up-converter's local signal input. This pin should be decoupled with 33 pF capacitor. This pin is not connected to internal circuit. This pin should be opened or grounded. Ground pin for modulator, upconverter and AGC circuits. This pin should be grounded with minimum inductance. Power save control pin for modulator, up-converter and AGC circuits. This pin also assigned as gain control pin for AGC circuits. Operation status with applied voltages are as follows. VPS/VAGC (V) 0 to 0.4 1 to 2.5 STATE OFF (Sleep Mode) On (AGC Mode)
17
-----------------
13
LO2in
-
1.8
13
14
14
LO2inb
-
1.8
15
N.C.
-
-
-----------------
16
GND
0
-
-----------------
17
VPS/VAGC
VPS/VAGC
-
REG
AGC Cont
18
N.C.
-
-
This pin is not connected to internal circuit. This pin should be opened or grounded. Ground pin for modulator, upconverter and AGC circuits. This pin should be grounded with minimum inductance. Supply voltage pin for modulator, up-converter and AGC circuits. Ground pin for RF output buffer. This pin should be grounded with minimum inductance.
-----------------
19
GND
0
-
-----------------
20
VCC
2.7 to 4.0
-
-----------------
21
GND
0
-
-----------------
Note Pin Voltages are measured on VCC = 3.0 V.
Preliminary Data Sheet P13831EJ1V1DS00
7
PC8158K
Supply Voltage (V) - Pin Voltage (V)
Note
Pin No. 22
Symbol
Function and Application
Internal Equivalent Circuit
N.C.
-
This pin is not connected to internal circuit. This pin should be opened or grounded. RF output pin. This pin is emitter follower which is low impedance output port. This pin can be easily matched to 50 impedance using external coupling and decoupling capacitors. These pins are not connected to internal circuit. These pins should be opened or grounded. Supply voltage pin for RF output buffer. External inductor and capacitor can supress harmonics spurious of LO1 frequency. LC value should be determined according to LO1 input frequency and suppression level.
-----------------
23
RFout
-
1.75
External
23
24
N.C.
-
-
-----------------
25
VCC
2.7 to 4.0
-
-----------------
26 27
Fil1 Fil2
- -
2.76 2.76
External 26 27
28
GND
0
-
Ground pin for modulator, upconverter and AGC circuits. This pin should be grounded with minimum inductance. Form the ground pattern as widely as possible to minimize ground impedance.
-----------------
Note Pin Voltages are measured on VCC = 3.0 V.
8
Preliminary Data Sheet P13831EJ1V1DS00
PC8158K
TEST CIRCUIT
Voltage Source
1 000 pF
0.22 F
Vector Signal Analyzer or Spectrum Analyzer
22 21 20 19 18 17 16 15
100 pF
Voltage Source or Pulse Pattern Generator
VPS/VAGC
GND VCC
GND
0.22 F
100 pF
Voltage Source
1 000 pF
GND
Signal Generator
2 pF
23 24 25
RFout VCC Fil1 Fil2 GND
UP-CON AGCcont AGC LPF
100 pF
1 000 pF
REG
26 27 28
REG I/Q Mixer Phase Shifter
I Ib Qb Q
VCC 11 BPF LO1in 10 330 pF LO1b 9 51 Signal Generator or Network 330 pF Analyzer
1
2
3
4
5
6
7
8
100 pF
100 pF 100 pF
100 pF
I/Q Signal Generator
TEST CONDITIONS fLO1in = 178.05 MHz, PLO1in = -15 dBm fLO2in = 1619.05 MHz, PLO2in = -15 dBm fRFout = 1441 MHz - fI/Qin
0.22 F
LO2b 14 33 pF LO2in 13 33 pF GND 12
51 51 BPF Voltage Source
Preliminary Data Sheet P13831EJ1V1DS00
9
PC8158K
PACKAGE DIMENSIONS
28 pin plastic QFN (UNIT: mm)
4 - 0.5
4 - 0.5
2 x 0.5 = 1
0.5
(5.1 0.1) 0.5
5.1 0.1
Pin 1 0.22 0.5 7 x 0.5 = 3.5 5.5 0.1
2 x 0.5 = 1
Pin 28
0.22 0.5
(4.7)
1.2
0.95 0.1
0.125
0.5
(0.22)
(5.1)
(4.1)
(5.5 0.1)
(0.22) 0.5 (4.5) 0.5
Bottom View
10
Preliminary Data Sheet P13831EJ1V1DS00
0.3
PC8158K
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact your NEC sales representative.
PC8158K
Recommended Condition Symbol IR35-00-2
Soldering Method Infrared Reflow
Soldering Conditions Package peak temperature: 235C or below Time: 30 seconds or less (at 210C) Note Count: 2, Exposure limit : None Pin temperature: 300C Time: 3 seconds or less (per side of device) Note Exposure limit : None
Partial Heating
-
Note After opening the dry pack, keep it in a place below 25C and 65% RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
Preliminary Data Sheet P13831EJ1V1DS00
11
PC8158K
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product.
M4 96. 5

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